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[VHDL-FPGA-Verilogmy_fifo_vhdl

Description: XILINX的FPGA实现的双口ram源码,可作为dsp\SDRAM和pci桥接作用,可直接使用,实际工程通过。-XILINX FPGA Implementation of the dual-port ram source, as dsp \ SDRAM and pci bridge, and can be used directly, through practical projects.
Platform: | Size: 19456 | Author: 朱效志 | Hits:

[VHDL-FPGA-VerilogHardware_Interface_Implementation_FPGA

Description:
Platform: | Size: 1508352 | Author: Dai Fenzhou | Hits:

[Other Embeded programor1k[1].tar

Description: 好东西啊,PCI的IP核.大家快下吧.@可以用来参考.FPGA设计的-Ah good things, PCI
Platform: | Size: 1132544 | Author: chen qiming | Hits:

[OtherFPGAIPcore_PCI

Description:
Platform: | Size: 5381120 | Author: 屈均伟 | Hits:

[MPIpci_core_verilog

Description: PCI-master的核,verilog语言,经测试,可完成芯片的综合及布线-PCI-master s nuclear, verilog language, by testing, to be completed by the integrated chip and wiring
Platform: | Size: 216064 | Author: 伊路发 | Hits:

[Software EngineeringCorePCIF_AHB_hb

Description: AHB to PCI Structure for FPGA/Asic Designer
Platform: | Size: 525312 | Author: 李晓媛 | Hits:

[OtherPCIlocalbus

Description: < PCI局部总线开发者指南>>电子版,是pci驱动程序开发的参考资料。-<PCI Local Bus Developer s Guide>> An electronic version is pci driver development reference.
Platform: | Size: 3239936 | Author: 闵君 | Hits:

[BooksBUS_pci

Description: pci总线的资料汇编,对嵌入式初学者很有用-pci bus compilation of information, useful for beginners in embedded
Platform: | Size: 7379968 | Author: 许为 | Hits:

[VHDL-FPGA-Verilogpci9030

Description: pci9030接口,可以实现与pci9030芯片的接口,-pci9030 interface can be achieved with pci9030 chip interface,
Platform: | Size: 1024 | Author: jz | Hits:

[VHDL-FPGA-Verilog6713emiftofpgatopci

Description: 6713emiftofpgatopci,这个是完整的一套从6713的emif到fpga的双口ram,然后主机通过9054到双口ram,交换数据完成-6713emiftofpgatopci, this is a complete set of the EMIF from 6713 to the FPGA
Platform: | Size: 2048 | Author: 丁科 | Hits:

[BooksPCI_KAIFABAODIAN_CD

Description: PCI开发宝典随书配套光盘,有部分源码、原理图、pcb!-PCI Development Baodian book with CD-ROM package, some source code, schematics, pcb!
Platform: | Size: 6036480 | Author: guolh | Hits:

[OtherS5933

Description: S5933接口简介 1.结构简介 2、主要引脚信号 3.、后端逻辑电路设计 4.PCI配置 5.PCI总线操作寄存器组 6.ADD-ON总线操作寄存器组 7.总线3总工作方式 8.重要信号时间参数 9.FPGA状态机设计举例-S5933 Interface Introduction 1. Structure Introduction 2, the main pin signal 3., Back-end logic design 4.PCI configuration Register Group 5.PCI bus operation 6.ADD-ON bus operation registers 7. Bus 3, the total work 8. An important signal time parameters For example state machine design 9.FPGA
Platform: | Size: 824320 | Author: wmagic | Hits:

[VHDL-FPGA-VerilogFPGA_SDRAM_PCI

Description: 一个基于FPGA的PCI数据采集程序,包括SDRAM控制,PCI9054时序控制,开发语言verilog,开发环境quartus-FPGA-based PCI data acquisition procedures, including SDRAM control, PCI9054 timing control, the development of language verilog, development environment quartusII
Platform: | Size: 2798592 | Author: 李国扬 | Hits:

[VHDL-FPGA-VerilogFPGA_PCI_DATA

Description: 一个基于FPGA的PCI数据发送程序,实现从计算机通过PCI9054向FPGA发送数据功能。开发语言verilog,开发环境quartus-FPGA-based PCI data distribution process, from the computer through the PCI9054 functions to send data to the FPGA. The development of language verilog, development environment quartusII
Platform: | Size: 236544 | Author: 李国扬 | Hits:

[VHDL-FPGA-Verilogyuyincaiji

Description: 语音采集与回放系统源代码:1.为了使读音数据存储的时间更长,速度更快,选用了256K*16Bit的SRAM;2.为了减少单片机的控制复杂度,使用了FPGA来控制SRAM的读写操作,节约了不少单片机的I/O资源;3.为了以后的高速数据存储,本设计中加入了fifo,其位宽及深度可在程序中自由设置,方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data storage, faster, 256K* 16Bit selected the SRAM 2. In order to reduce the complexity of single-chip control, the use of the FPGA to control the SRAM The read and write operations, saving a lot of microcontroller I/O resources 3. to future high-speed data storage, the design into the fifo, its width and depth can be set up in the process of free, convenient and flexible.
Platform: | Size: 804864 | Author: song | Hits:

[Embeded-SCM DevelopDM642pci

Description: DM642 PCI q驱动 包括主机端和目标端-DM642 PCI q drive, including the host side and target side
Platform: | Size: 880640 | Author: 刘德坤 | Hits:

[Embeded-SCM DevelopThis_is_pci-wishbone_nuclear_and_16450_serial_port

Description: 这是用pci-wishbone核和16450串口核在xilinx的FPGA上实现的。-This is pci-wishbone nuclear and 16450 serial port on the nucleus in xilinx FPGA-implemented.
Platform: | Size: 8428544 | Author: iceskull | Hits:

[Program docrjwxdpt

Description: 软件无线电技术是用于卫星导航和第三代移动通信(3G) 数据处理和计算的最优解决方案。运用基于FPGA的So PC 嵌入式设计方法构造软件无线电系统,提高了对动态实时信号的处理能力。设计完成无线通信体系结构,以及ADC 模数转换,数字下变频,CPU 中央处理器,DSP 运算单元,PCI 桥以及数据控制等模块的详细组成。相对于目前常规系统,该系统在功耗和体积方面可节省30 以上,对高速数据流的处理和计算能力有显著提高,可以应用于Cellular/ PCS 基站,GPS 抗干扰接收机,相控阵接收机,频谱分析和3G无线通信等领域。-Software radio technology is used for satellite navigation and third-generation mobile communication (3G) data processing and computing the optimal solution. So PC using FPGA-based embedded design methods to create software-defined radio system to improve the dynamic real-time signal processing capabilities. Wireless communications architecture design is completed and the ADC analog-digital conversion, digital down conversion, CPU CPU, DSP computing unit, PCI bridge, and data control module, the detailed composition. Relative to the current conventional systems, the system can save power consumption and size are more than 30 of the high-speed data stream processing and computing power has significantly increased, can be applied to Cellular/PCS base stations, GPS anti-jamming receivers, phased array receivers, spectrum analysis, and 3G wireless communications and other fields.
Platform: | Size: 516096 | Author: x | Hits:

[Program docFPGA_based_data_acquisit_on_system

Description: 基于FPGA的数据采集系统研究,fpga芯片的pci总线接口设计-FPGA based data acquisition system, fpga pci bus interface chip
Platform: | Size: 2982912 | Author: 尚林 | Hits:

[VHDL-FPGA-Verilogpci32tlite_oc_latest.tar

Description: pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC s in ALTERA CYCLONE II FPGA).-pci32 taget core ip, The core has been designed to permit interface between a PCI Master and simple WHISBONE Slaves, and fitting into smallest FPGA (about 200 LC' s in ALTERA CYCLONE II FPGA).
Platform: | Size: 7813120 | Author: shen | Hits:
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